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New 300 GHz transmitter enhances 6G and radar technologies

A team of researchers led by Professor Kenichi Okada from Tokyo Institute of Technology (Tokyo Tech) and NTT Corporation have developed a 300 GHz band transmitter that could pave the way for many technological applications, including body and cell monitoring, radar, 6G wireless communications and terahertz sensors.

At present, most frequencies above the 250 GHz mark remain unallocated. Accordingly, many researchers are developing 300 GHz transmitters/receivers to capitalise on the low atmospheric absorption at these frequencies, as well as the potential for extremely high data rates that comes with it. However, high-frequency electromagnetic waves become weaker at a fast pace when travelling through free space. To combat this problem, transmitters must achieve a large effective radiated power. While some interesting solutions have been proposed, it is challenging for a 300 GHz-band transmitter manufactured via conventional CMOS processes to simultaneously realise high output power and small chip size.

The proposed solution from Tokyo Tech is a phased-array transmitter composed of 64 radiating elements, which are arranged in 16 integrated circuits with four antennas each. Since the elements are arranged in three dimensions by stacking printed circuit boards (PCBs), this transmitter supports 2D beam steering. As a result, the transmitted power can be aimed both vertically and horizontally, allowing for fast beam steering and tracking receivers efficiently.

The researchers used Vivaldi antennas, which can be implemented directly on-chip and have a suitable shape and emission profile for high frequencies. Another feature of the proposed transmitter is its power amplifier (PA)-last architecture. By placing the amplification stage before the antennas, the system only needs to amplify signals that have already been conditioned and processed. This leads to higher efficiency and better amplifier performance.

The researchers addressed some common problems that arise with conventional transistor layouts in CMOS processes, such as high gate resistance and large parasitic capacitances. The researchers optimised layout by adding drain paths and vias and by altering the geometry and element placing between metal layers. Okada said that compared to the standard transistor layout, the parasitic resistance and capacitances in the proposed transistor layout are all mitigated. “In turn, the transistor-gain corner frequency, which is the point where the transistor’s amplification starts to decrease at higher frequencies, was increased from 250 to 300 GHz,” Okada said.

The researchers also designed and implemented a multi-stage 300 GHz power amplifier to be used with each antenna. Excellent impedance matching between stages reportedly enabled the amplifiers to demonstrate outstanding performance. “The proposed power amplifiers achieved a gain higher than 20 dB from 237 to 267 GHz, with a sharp cut-off frequency to suppress out-of-band undesired signals,” Okada said. The proposed amplifier also achieved a noise figure of 15 dB which was evaluated by the noise measurement system in 300 GHz band.

The proposed transmitter was tested through simulations and experiments and obtained promising results, achieving a data rate of 108 Gb/s in on-PCB probe measurements. The transmitter also displayed remarkable area efficiency compared to other CMOS-based designs alongside low power consumption, highlighting its potential for miniaturised and power-constrained applications. Notable use cases include sixth-generation (6G) wireless communications, high-resolution terahertz sensors, and human body and cell monitoring.

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